NASA Tests HPSC Chip at 500x Current Spaceflight Processors as Mars Delays Reach 44 Minutes
Updated
Updated · spacedaily.com · Aug 14
NASA Tests HPSC Chip at 500x Current Spaceflight Processors as Mars Delays Reach 44 Minutes
1 articles · Updated · spacedaily.com · Aug 14
Summary
JPL says NASA’s palm-sized HPSC processor is showing early performance about 500 times higher than radiation-hardened chips now used in spacecraft, far above the program’s original 100x capability goal.
The result comes from ground testing—not a flight mission—and NASA still must complete radiation, thermal, shock and qualification work before naming any debut mission.
HPSC is designed to pair modern computing with space resilience, using fault tolerance, error correction and power controls so spacecraft can run bounded AI tasks such as hazard detection, data triage and fault response.
At Mars, a radio round trip can take roughly 44 minutes, making some onboard decisions unavoidable and increasing the value of processing sensor data locally instead of sending all raw measurements to Earth.
NASA has not said which current chip anchors the 500x comparison, but the broader aim is a flight computer that can safely shorten the gap between sensing a problem and taking action in deep space.