Waymo Unveils 5nm ASIC Delivering 1,000 TOPS for Autonomous Driving
Updated
Updated · Waymo · Aug 20
Waymo Unveils 5nm ASIC Delivering 1,000 TOPS for Autonomous Driving
3 articles · Updated · Waymo · Aug 20
Summary
Waymo said its new purpose-built 5nm ASIC handles front-end sensor processing and neural-network workloads in real time, delivering more than 1,000 TOPS for its autonomous driving stack.
The chip is designed to cut milliseconds from “pixels-to-actuation” latency by processing and fusing raw lidar, radar and camera data onboard, a requirement for driverless operation without human backup.
Waymo said its latest compute system now processes high-fidelity feeds from 13 high-resolution cameras simultaneously, with custom accelerators improving low-light perception through features including temporal denoising.
The ASIC sits inside a broader heterogeneous, redundant compute architecture that Waymo says has scaled raw compute 20-fold in eight years while preserving battery efficiency, trunk space and silent operation.
Waymo framed the silicon push as part of a decade-long co-design effort with partners including AMD, NVIDIA, Samsung and TSMC as it prepares for broader uses of the Waymo Driver.